Intel quietly revised one AI number by 10x

Hi {{first_name|Investor}} -

Intel reported on Thursday and the headline numbers got the attention — sixth straight beat, 41% gross margins, $13.6B in revenue. But the most thesis-shaping line on the call wasn't about Intel itself.

When asked about advanced packaging, CFO David Zinsner said something I keep coming back to:

From “hundreds of millions” to “billions.” A 10x revision. From a CFO who has every incentive to be conservative.

That's not an Intel story. That's a market-structure story. And the investable surface around it is wider than most people realize.

For the last three years, every conversation about AI infrastructure has been about one thing: can we get enough chips? Wafer capacity. EUV lithography. TSMC's 3nm and Intel's 18A. The constraint was assumed to be the silicon itself.

That bottleneck is easing. Intel's own factory output is now running ahead of internal projections. TSMC is ramping. The new constraint sits one layer up the stack — at the assembly of those chips.

Modern AI accelerators are no longer single chips. They're assemblies — multiple chiplets (smaller specialized chips) bonded together with high-bandwidth memory (HBM, the stacked memory that sits next to the GPU and feeds it data) using 2.5D and 3D packaging techniques (where chips are placed side-by-side or stacked vertically rather than wired across a circuit board). NVIDIA's Blackwell. AMD's MI300. Intel's Gaudi. Every leading-edge AI accelerator on the market today depends on advanced packaging to function. You can have all the wafers in the world, but if you can't package them, you can't ship them.

This is what Zinsner was telling us. The capacity to fabricate the silicon is catching up. The capacity to assemble the silicon hasn't.

Three forces are converging here.

One — chiplet architectures are now the default. Building a single monolithic chip at the leading edge has become economically prohibitive. Yields collapse, costs explode. The industry's answer is to design smaller chiplets and bond them together. That's a packaging problem, not a chip problem.

Two — HBM is the unlock for AI workloads. Modern GPUs are bottlenecked by memory bandwidth, not raw compute. HBM solves that, but it has to sit physically adjacent to the processor and connect through advanced packaging. Every incremental HBM stack is incremental packaging demand.

Three — the same packaging capacity serves AI accelerators, networking silicon, and increasingly CPUs. The demand isn't pulling from one product line. It's pulling from the entire leading-edge complex at once.

This is why Intel's revision matters. They weren't seeing demand from one customer surprise to the upside. They were seeing the entire industry's assembly bottleneck show up in their order book.

The 2010s smartphone era is the cleanest analog. Apple got the headlines, but the durable value compounded one layer down — Corning made the screen glass, ARM licensed the chip designs, Qualcomm shipped the modems. The investors who outperformed in that cycle weren't the ones picking the consumer story. They were the ones picking the layer below it.

Notice that Corning is showing up again. The same company that captured the smartphone glass boom is now positioned for the AI packaging glass boom. When a structural shift produces winners on the same playbook twice, that's a pattern worth taking seriously. It usually means the underlying skill — materials science, in Corning's case — is genuinely defensible across cycles, not a one-time lucky positioning.

The implication is broader than Corning specifically. The packaging story is being driven by the same dynamic that created Qualcomm and ARM in the smartphone era: a structural complexity shift that the consumer-facing companies can't solve themselves, so they pay specialists at the layer below to solve it for them.

This is a multi-layer opportunity, not a single-stock thesis. Here's how I'm thinking about each layer and the names that anchor them.

Layer 1 — Outsourced Assembly and Test (OSATs). These are the contract packagers — the companies hyperscalers and chip designers go to when they need advanced packaging capacity their primary foundry can't provide. Amkor Technology (AMKR) and ASE Technology (ASX) are the two public-market incumbents. The signal I'm watching: capacity utilization rates and CapEx commentary on their next earnings calls. If utilization is holding above 85% with rising CapEx guidance, the Intel signal is being confirmed broadly.

Layer 2 — IC Substrates. The high-density boards that chips sit on. Substrates are themselves a constrained resource right now — Intel called out substrate cost increases as a margin headwind, which is buyer-language for "supply is tight and prices are firming." The dominant suppliers are Japanese (Ibiden, Shinko Electric) and Taiwanese (Unimicron). Less liquid for US-based investors but worth tracking. The clearer public-market read here: substrate pricing power flows directly into the OSATs as cost pressure, so the layer-1 names benefit if they can pass it through.

Layer 3 — Glass Substrates. This is the layer most people aren't watching yet. Intel specifically named glass substrates — not the standard organic substrates the industry has used for decades — as a cost pressure category. Glass is being adopted because it allows for tighter packaging tolerances and larger reticle sizes, which matter increasingly as chip designs grow. Corning (GLW) is the most direct public-market play. Early innings, but a specific call-out from a major buyer is signal worth weighting.

Layer 4 — Packaging Equipment & Metrology. The machines that actually do the assembly, plus the inspection tools that validate every joint, bond, and stack. Applied Materials (AMAT) has the broadest packaging equipment portfolio. KLA (KLAC) is the metrology specialist — and Intel called out specifically that they "brought in external partners that are particularly good at metrology" to drive 18A yield improvements. That's KLA's lane, and it's a quiet but direct shoutout.

A name to keep on the watchlist for completeness: TSMC (TSM) itself runs the largest advanced packaging operation in the world (their CoWoS technology is what NVIDIA's Blackwell depends on). They're not a "second-order" beneficiary — they're already the primary one. But their packaging capacity is the constraint that's forcing the rest of this stack to expand.

Note: I hold positions in all names except Shinko Electric and Unimicron mentioned in this section.

Two principles I'd apply if you're building exposure here.

Spread across at least two layers. The packaging story isn't a single-stock thesis — it's a supply-chain thesis. A basket with one OSAT and one equipment name covers more of the bottleneck than two OSATs would. Concentration inside a single layer gives you exposure to the company, not the theme.

Weight to where revenue is already visible. Amkor and KLA already have packaging revenue showing up in quarterly results. Corning's glass-substrate ramp is real but earlier-stage. Size to where the income statement is, not where the press release is.

Watch three signals on the next earnings cycle. First, packaging lead times in supplier commentary — extending lead times mean the bottleneck is worsening, which is bullish for everyone in the supply chain. Second, qualification announcements — an OSAT or substrate maker picking up a named NVIDIA, AMD, or hyperscaler program is hard signal. Third, the language hyperscalers use — when Microsoft, Google, or Meta shift from describing themselves as "chip-constrained" to "packaging-constrained," consensus has caught up and the easy entry is over. The window to position before that happens is narrower than it looks.

Some readers reasonably prefer ETFs to building a basket — for simplicity, tax efficiency, or just to avoid managing individual positions. Worth being honest about the tradeoff: there is no packaging-pure ETF, and the closest options bundle in too much of what you likely already own.

The broad option. SOXX (iShares Semiconductor) and SMH (VanEck Semiconductor) are the popular broad semis ETFs. Both are heavily concentrated in NVIDIA, TSMC, and AMD — top ten holdings make up roughly two-thirds of each fund. Useful as core AI infrastructure exposure, less useful for capturing the packaging tilt specifically.

The closer-fit option. XSD (SPDR S&P Semiconductor) uses an equal-weight methodology, which gives meaningful exposure to smaller semi names — including OSATs and specialty equipment makers — that get drowned out in market-cap-weighted funds. Still a blunt instrument, but the closest off-the-shelf approximation to the basket above.

The honest read: the ETF route gets you partial credit on this thesis. The basket route gets you the actual position. Either is a defensible choice — the wrong choice is having no exposure at all if you believe the bottleneck has genuinely moved.

No thesis is bulletproof. The three I'd flag here:

One — hyperscaler CapEx normalizes. If Microsoft, Meta, Google, or Amazon dial back AI infrastructure spending in 2027 because monetization disappoints, the packaging bottleneck eases before the second-order names finish re-rating. The CapEx Payback Test I wrote about for the Mag 7 is the right lens here — if the AI revenue doesn't materialize, the spending doesn't sustain, and the packaging tailwind weakens.

Two — NVIDIA or AMD vertically integrate packaging. Either has the scale and capital to bring more advanced packaging in-house, capturing margin currently flowing to the OSATs. Worth watching capital allocation announcements over the next twelve months — particularly any acquisition or fab buildout commentary.

Three — Chinese competitors enter the OSAT market at the lower end. This wouldn't threaten the leading-edge packaging where the AI demand sits, but it could compress pricing on second-tier substrate and assembly names. Differentiated capabilities — glass substrates, advanced metrology, hyperscaler-qualified processes — are what insulate the basket from this risk.

The market spent three years asking can we make enough chips? The next two years will be about can we assemble them? Intel's revision this week is the cleanest data point we've had on that shift. The companies that benefit aren't the obvious ones, and most of them aren't on the front page yet.

That's where the work-optional portfolio gets built — in the layer below the headline, while the rest of the market is still reading the headline.

As always: I won't tell you what to buy. I'll sharpen the lens you use to look.

I’ll see you in part 2 tomorrow.

Stay disciplined, Koh