HBM revisit: where the AI memory margin actually lives

Hey {{first_name|Investor}} -

Week two of the mid-year theme-revisit series. This week the theme is HBM (high-bandwidth memory), because the HBM3E to HBM4 transition is restructuring the cost curve under the memory makers in ways the headlines don't fully capture.

A few things have shifted in how I think about HBM since I first started covering it on my channels.

The memory makers have ridden the AI capex wave through 2025 and into 2026, and that part of the trade played out roughly on schedule. Micron, SK Hynix, and Samsung have all seen explosive HBM revenue scaling alongside hyperscaler AI accelerator buying, exactly as the consensus expected. The revenue numbers are working.

What I'd add to that picture is the structural cost layer underneath the revenue, because the HBM4 transition is steeper than the headlines suggest. Compounding yields at 16-layer stacks, the move from solder bonding to direct copper-to-copper hybrid bonding, and the introduction of foundry logic into the base die are all converging into what I've been calling the yield cliff.

The inspection and metrology angle is the one I've been pointing to for a while, and the structural read keeps getting clearer as HBM4 details emerge. The companies selling the diagnostic tools that keep yields from collapsing are insulated from the margin pressure the memory makers face.

The thing that surprised me most heading into 2026 was how aggressively the timeline is compressing. Hyperscalers are pulling HBM4 demand forward, and that's accelerating the pressure on yield learning. Initial HBM4 yield rates will likely reset to historic lows during the ramp, which makes the inspection layer story even more time-sensitive than I expected a few months ago.

The anchors come first, disclosed in full because they're the names I've already covered across the channel.

That's the established core, and each name sits on a different layer of the HBM stack. Beyond it, I'm carrying two positions at the back-end assembly layer and one newer position at the system layer, where memory gets attached to AI servers rather than made at the silicon level. Those three names, plus the inspection and test watchlist that rounds out the basket, are in Sunday's deeper read.

I've covered the broader memory and supply chain setup on my channels. If you want the walkthrough on memory makers, the HBM cycle and relevant names, those resources are below.

Most coverage of HBM focuses on memory revenue scaling at SK Hynix, Samsung, and Micron. That part of the story is real. What I'd add is that the structural margin story sits in a different layer of the supply chain.

HBM is not a single chip. It's a stack of eight to sixteen individual DRAM dies layered vertically and connected through thousands of microscopic vertical tunnels called Through-Silicon Vias. Think of those vias as elevator shafts running through every floor of a skyscraper, carrying data and power between layers. The dies sit on top of each other with tiny solder bumps holding them in electrical contact, like a stack of pancakes glued together with butter at the corners.

The problem is compounding yields. If a single DRAM die rolls off the line with a 95% yield rate, which is roughly the industry baseline, stacking twelve of them drops the structural yield of the final HBM package to about 54%. That math is 0.95 raised to the twelfth power, and the failure mode is brutal: a single defective die anywhere in the stack ruins the entire package, throwing away eleven perfectly good layers of memory in the process.

HBM4 makes this dramatically more punishing, which is where the structural opportunity lives. HBM4 doubles the total bus width, which forces the base die (the foundation layer that handles high-speed routing) to move from standard memory processes onto advanced foundry logic nodes, the same 4-nanometer and 5-nanometer processes TSMC uses for cutting-edge GPUs. And to fit sixteen layers of DRAM into the same physical envelope as older eight-layer stacks, HBM4 requires direct copper-to-copper hybrid bonding, where the copper pads of one die fuse directly to the copper pads of the next at the atomic level. Think of it as fusing two pieces of glass together perfectly without any adhesive: the surfaces have to be flawlessly flat and clean, or the bond fails and an invisible void destroys the entire stack.

Initial HBM4 yield rates are likely to reset to historic lows for the memory makers, which is the cliff itself. The companies that capture margin in that environment aren't the ones making the memory. They're the ones selling the diagnostic tools that keep yields from collapsing entirely.

The first one is the inspection, metrology, and test layer. Companies that measure atomic flatness, scan for sub-surface voids, and electrically probe individual dies before bonding capture stable, high-margin revenue regardless of which memory manufacturer wins market share. Their utilization intensity per HBM4 wafer is structurally higher than per HBM3E wafer, which means revenue can grow even if total HBM unit volumes flatten. This is where my highest conviction sits.

The second is the memory makers themselves. The supplier that climbs the HBM4 yield curve fastest will take share from the other two, and Micron, disclosed above, is the one I see carrying the cleanest execution edge heading into this cycle. Owning both doors gives coverage on the upside if the cliff turns out to be shallower than expected, while preserving the structural insulation if the cliff is as steep as the engineering suggests.

Both areas are real, both sit at a layer of the supply chain that gets less coverage than the visible mega-caps, and both have publicly traded names you can research without holding only the household-name AI accelerator stocks.

If you'd rather get thematic exposure to the HBM and memory ecosystem without picking individual names, a handful of ETFs cover this theme directly. The first question to answer is whether you want pure memory exposure or broader semiconductor equipment exposure, because the two baskets behave differently through the cycle.

The Roundhill Memory ETF ($DRAM) is the closest pure-play option for memory exposure specifically, holding the three memory makers (Micron, SK Hynix, Samsung) alongside related semiconductor names tied to the memory supply chain. This is the cleanest way to get HBM-adjacent exposure if you want the memory-cycle beta. I currently hold this one as a catch-all alongside my individual Micron position.

The VanEck Semiconductor ETF ($SMH) carries meaningful weight in the broader semiconductor equipment names, including KLA Corporation, Applied Materials, and Lam Research, alongside the memory makers and the AI compute mega-caps. It's more concentrated at the top, with Nvidia and TSMC as the largest holdings.

The iShares Semiconductor ETF ($SOXX) covers similar equipment-layer ground but is broader across US-listed semiconductor names. Neither is a pure memory play, but both give you exposure to the inspection and equipment layer at the center of this issue's thesis.

The Global X AI Semiconductor & Quantum ETF ($CHPX) is another option if you want AI-focused semiconductor exposure with a quantum tilt. Holdings include ASML, TSMC, Nvidia, Broadcom, and Micron alongside emerging quantum names. Less memory-specific than DRAM, but broader on the AI compute angle.

The simplest way to think about the decision: if you want pure memory exposure to ride the HBM4 cycle directly, DRAM is the cleanest option. If you want broader semiconductor equipment exposure that includes the inspection layer where I weight my highest conviction, SMH or SOXX gives you that broader basket. I'm not telling you which side to land on. The point is that funds that look similar on the surface can have meaningfully different underlying exposures, and the choice belongs to you.

Sunday picks up exactly here, with the full basket across both angles: the additional inspection and metrology names beyond KLA, the test equipment layer, the two assembly-layer positions and the newer system-layer position I held back above, and how I'm thinking about the broader memory ecosystem.

If you've been thinking about how to position around the HBM4 transition without just holding the obvious memory makers, premium subscribers get access to those names.

UPGRADE YOUR SUBSCRIPTION FOR FULL ACCESS

Stay disciplined - Koh

Disclaimer: Nothing in this newsletter constitutes investment advice or a recommendation to buy or sell any security. Numbers and observations are as of publication. I may hold positions in companies discussed above. Always do your own research and consult a licensed financial advisor before making investment decisions.